1. Technical Field
The present invention relates to a semiconductor wafer, a method of producing a semiconductor wafer and an electronic device.
2. Related Art
Silicon is usually used as an N-type channel material of a MIS-type gate FET (MISFET: Metal-Insulator-Semiconductor Field-Effect Transistor), which is a basic device of a large-scale integrated circuit. On the other hand, a Group III-V compound semiconductor enables high-speed operation thanks to the high electron mobility it provides, and is regarded as a prospect for application as an alternative material to silicon in an N-type MISFET. In a high electron mobility transistor (HEMT) or a pseudomorphic high electron mobility transistor (P-HEMT) that has a Schottky-gate structure or a pn junction gate structure, a Group III-V compound semiconductor has already been used as its channel material, and often utilized for a high-frequency communication device. For a purpose of obtaining a further favorable transistor performance such as a higher gate breakdown voltage, research for a transistor that has a MIS gate structure (hereinafter, sometimes referred to as “MIS structure”) has been conducted, and Non-patent Literature 1 discloses a MIS-HEMT that has a MIS gate structure and Non-patent Literature 2 discloses a MIS-P-HEMT that has a MIS gate structure.
In order to favorably operate an electronic device that has a MIS structure, control of the interface between a Group III-V compound semiconductor and an insulator, that is, reduction of energy levels (hereinafter, referred to as “interface states”) formed at and near the interface between the Group III-V compound semiconductor and the insulator. The interface state may cause lowering of the electric field controllability of a free carrier in a channel, and lowering of the operation speed due to charging and discharging of carriers between the interface states and conduction or valence bands. Also, it may become a factor of carrier disappearance due to interface recombination. Furthermore, interface states may become a factor of degradation of the transistor performance such as lowering of carrier mobility.
As effective interface state reduction methods, Non-patent Literature 3 describes about processing of a surface of a compound semiconductor by using sulfide, Non-patent Literature 4 describes about processing of a surface of a compound semiconductor by using silane and ammonia, and Non-patent Literature 5 describes about use of amorphous silicon as an interface layer. Also, Patent Literature 1 describes about an invention of a MIS-type electric field effect transistor of a compound semiconductor. The invention has been made for a purpose of providing a MIS-type electric field effect transistor with low gate leak current and less interface states occurring at an insulating film/a compound semiconductor that operates at high voltage and shows high output characteristics, and is characterized in that the gate insulating film is a an oxide of aluminum containing nitrogen. It is stated that by using an oxide of aluminum containing nitrogen for the gate insulating film, leakage paths within the film are eliminated, and by obtaining a sufficient barrier height with respect to a nitride semiconductor, it is possible to lower the gate leak current, and control interface states occurring at the semiconductor interface which becomes a main factor of temporal fluctuation in the drain current.